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Differing Offsets from IFRExtractor LS and RS #18

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chrisdma opened this issue Jul 4, 2023 · 0 comments
Open

Differing Offsets from IFRExtractor LS and RS #18

chrisdma opened this issue Jul 4, 2023 · 0 comments

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@chrisdma
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chrisdma commented Jul 4, 2023

Hello,

i have attempted to use IFRExtractor, both the LS and RS versions, and they each give different offsets for the option I am trying to disable.

My BIOS has some sort of "Enable Flash Protection Range Registers" enabled so I cannot write the BIOS region of my SPI, so I am attempting to disable it.

In both extractors I can see the range register text but I am getting different offsets; however when reading the offsets, those values are 0x00, when the correct value should be enabled as I am trying to disable it.

Can I have one of you all look at my BIOS as maybe there's something in it thats messing up the formatting of IFRExtractor?

For clarification, I am using setup_var.efi 0x73A (or 0x73D, both reported offsets) to see the values from an EFI shell and they both are reading as 0x00.

EDIT: After changing the command to setup_var.efi 0x73A -n PchSetup (or 0x73D) I was able to see the enabled bytes, however disabling them made no difference. After a reboot the value didn't persist, so i tried using fpt.efi to write to the BIOS region of the flash chip while the bytes were set to 0 in the EFI shell and I am still receiving the error that Protected Range Registers are currently set.

Thanks for any help in advance,
Chris

@chrisdma chrisdma changed the title Differing Values from IFRExtractor LS and RS Differing Offsets from IFRExtractor LS and RS Jul 4, 2023
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