ADD: a basic BTM N-trace spec compliant trace encoder model

riscv/execute.cc

@@ -2,9 +2,12 @@
 
 #include "config.h"
 #include "processor.h"
+#include "trace_ingress.h"
+#include "trace_encoder_n.h"
 #include "mmu.h"
 #include "disasm.h"
 #include "decode_macros.h"
+#include "trace_ingress.h"
 #include <cassert>
 
 static void commit_log_reset(processor_t* p)
@@ -162,6 +165,7 @@ inline void processor_t::update_histogram(reg_t pc)
 static inline reg_t execute_insn_fast(processor_t* p, reg_t pc, insn_fetch_t fetch) {
   return fetch.func(p, fetch.insn, pc);
 }
+
 static inline reg_t execute_insn_logged(processor_t* p, reg_t pc, insn_fetch_t fetch)
 {
   if (p->get_log_commits_enabled()) {
@@ -173,6 +177,20 @@ static inline reg_t execute_insn_logged(processor_t* p, reg_t pc, insn_fetch_t f
 
   try {
     npc = fetch.func(p, fetch.insn, pc);
+
+    if (p->get_trace_enabled()) {
+      hart_to_encoder_ingress_t packet {
+        .i_type = _get_insn_type(&fetch.insn, npc != p->get_state()->pc + insn_length(fetch.insn.bits())),
+        .exc_cause = 0,
+        .tval = 0,
+        .priv = P_M, // TODO: check for processor privilege level
+        .i_addr = pc,
+        .iretire = 1,
+        .ilastsize = insn_length(fetch.insn.bits())/2,
+      };
+      p->trace_encoder.push_commit(packet);
+    }
+
     if (npc != PC_SERIALIZE_BEFORE) {
       if (p->get_log_commits_enabled()) {
         commit_log_print_insn(p, pc, fetch.insn);
@@ -205,7 +223,7 @@ static inline reg_t execute_insn_logged(processor_t* p, reg_t pc, insn_fetch_t f
 bool processor_t::slow_path()
 {
   return debug || state.single_step != state.STEP_NONE || state.debug_mode ||
-         log_commits_enabled || histogram_enabled || in_wfi || check_triggers_icount;
+         log_commits_enabled || histogram_enabled || in_wfi || check_triggers_icount || trace_enabled;
 }
 
 // fetch/decode/execute loop

riscv/processor.cc

@@ -12,6 +12,7 @@
 #include "platform.h"
 #include "vector_unit.h"
 #include "debug_defines.h"
+#include "trace_encoder_n.h"
 #include <cinttypes>
 #include <cmath>
 #include <cstdlib>
@@ -182,6 +183,11 @@ void processor_t::enable_log_commits()
   log_commits_enabled = true;
 }
 
+void processor_t::enable_trace()
+{
+  trace_enabled = true;
+}
+
 void processor_t::reset()
 {
   xlen = isa.get_max_xlen();
@@ -204,6 +210,8 @@ void processor_t::reset()
 
   if (sim)
     sim->proc_reset(id);
+
+  trace_encoder.reset();
 }
 
 extension_t* processor_t::get_extension()

riscv/processor.h

@@ -17,6 +17,7 @@
 #include "triggers.h"
 #include "../fesvr/memif.h"
 #include "vector_unit.h"
+#include "trace_encoder_n.h"
 
 #define FIRST_HPMCOUNTER 3
 #define N_HPMCOUNTERS 29
@@ -253,7 +254,9 @@ class processor_t : public abstract_device_t
   void set_debug(bool value);
   void set_histogram(bool value);
   void enable_log_commits();
+  void enable_trace();
   bool get_log_commits_enabled() const { return log_commits_enabled; }
+  bool get_trace_enabled() const { return trace_enabled; }
   void reset();
   void step(size_t n); // run for n cycles
   void put_csr(int which, reg_t val);
@@ -367,6 +370,8 @@ class processor_t : public abstract_device_t
 
   void check_if_lpad_required();
 
+  trace_encoder_n* get_trace_encoder() { return &trace_encoder; }
+
 private:
   const isa_parser_t isa;
   const cfg_t * const cfg;
@@ -380,6 +385,7 @@ class processor_t : public abstract_device_t
   unsigned xlen;
   bool histogram_enabled;
   bool log_commits_enabled;
+  bool trace_enabled; // whether core needs to trace instructions - does not mean the encoder itself is enabled!
   FILE *log_file;
   std::ostream sout_; // needed for socket command interface -s, also used for -d and -l, but not for --log
   bool halt_on_reset;
@@ -432,6 +438,7 @@ class processor_t : public abstract_device_t
 
   vectorUnit_t VU;
   triggers::module_t TM;
+  trace_encoder_n trace_encoder;
 };
 
 #endif

riscv/riscv.mk.in

@@ -44,6 +44,8 @@ riscv_install_hdrs = \
 	trap.h \
 	triggers.h \
 	vector_unit.h \
+	trace_ingress.h \
+	trace_encoder_n.h \
 
 riscv_precompiled_hdrs = \
 	insn_template.h \
@@ -73,6 +75,7 @@ riscv_srcs = \
 	vector_unit.cc \
 	socketif.cc \
 	cfg.cc \
+	trace_encoder_n.cc \
 	$(riscv_gen_srcs) \
 
 riscv_test_srcs = \

riscv/sim.cc

@@ -316,15 +316,20 @@ void sim_t::set_histogram(bool value)
   }
 }
 
-void sim_t::configure_log(bool enable_log, bool enable_commitlog)
+void sim_t::configure_log(bool enable_log, bool enable_commitlog, bool trace)
 {
   log = enable_log;
 
-  if (!enable_commitlog)
-    return;
+  if (enable_commitlog) {
+    for (processor_t *proc : procs) {
+      proc->enable_log_commits();
+    }
+  }
 
-  for (processor_t *proc : procs) {
-    proc->enable_log_commits();
+  if (trace) {
+    for (processor_t *proc : procs) {
+      proc->enable_trace();
+    }
   }
 }
 

riscv/sim.h

@@ -48,7 +48,7 @@ class sim_t : public htif_t, public simif_t
   //
   // If enable_log is true, an instruction trace will be generated. If
   // enable_commitlog is true, so will the commit results
-  void configure_log(bool enable_log, bool enable_commitlog);
+  void configure_log(bool enable_log, bool enable_commitlog, bool trace);
 
   void set_procs_debug(bool value);
   void set_remote_bitbang(remote_bitbang_t* remote_bitbang) {

riscv/trace_encoder_n.cc

@@ -0,0 +1,201 @@
+#include "trace_encoder_n.h"
+
+void trace_encoder_n::reset() {
+  this->state = TRACE_ENCODER_N_IDLE;
+  this->icnt = 0;
+  this->packet_0 = hart_to_encoder_ingress_t(); // create empty packet
+  this->packet_1 = hart_to_encoder_ingress_t(); // create empty packet
+  this->enabled = false;
+  this->active = true;
+}
+
+void trace_encoder_n::set_enable(bool enabled) {
+  bool was_enabled = this->enabled;
+  this->enabled = enabled;
+  if (!was_enabled && enabled) {
+    this->state = TRACE_ENCODER_N_IDLE;
+  }
+}
+
+void trace_encoder_n::push_commit(hart_to_encoder_ingress_t packet) {
+  this->packet_1 = this->packet_0;
+  this->packet_0 = packet;
+  if (this->enabled) {
+    fprintf(this->debug_reference, "%lx\n", packet.i_addr);
+    if (this->state == TRACE_ENCODER_N_IDLE) {
+      generate_packet(TCODE_PROG_TRACE_SYNC);
+      this->state = TRACE_ENCODER_N_DATA;
+      this->icnt += this->packet_0.ilastsize;
+    } else if (this->state == TRACE_ENCODER_N_DATA) {
+      this->icnt += this->packet_0.ilastsize;
+      if (this->packet_1.i_type == I_BRANCH_TAKEN) {
+        generate_packet(TCODE_DBR);
+        this->icnt = this->packet_0.ilastsize;
+      } else if (this->packet_1.i_type == I_JUMP_INFERABLE || this->packet_1.i_type == I_JUMP_UNINFERABLE) {
+        generate_packet(TCODE_IBR);
+        this->icnt = this->packet_0.ilastsize;
+      }
+      this->state = this->icnt >= MAX_ICNT ? TRACE_ENCODER_N_FULL : TRACE_ENCODER_N_DATA;
+  } else if (this->state == TRACE_ENCODER_N_FULL) {
+      generate_packet(TCODE_FULL);
+      this->state = TRACE_ENCODER_N_DATA;
+      this->icnt = 0;
+    }
+  } 
+}
+
+void print_packet(trace_encoder_n_packet_t* packet) {
+  printf("[trace_encoder_n] printing packet: tcode: %lx, src: %lx, icnt: %lx, f_addr: %lx, u_addr: %lx, b_type: %lx\n", packet->tcode, packet->src, packet->icnt, packet->f_addr, packet->u_addr, packet->b_type);
+}
+
+void print_encoded_packet(uint8_t* buffer, int num_bytes) {
+  printf("[trace_encoder_n] encoded packet: ");
+  for (int i = 0; i < num_bytes; i++) {
+    printf("%lx ", buffer[i]);
+  }
+  printf("\n");
+}
+
+void trace_encoder_n::generate_packet(tcode_t tcode) {
+  trace_encoder_n_packet_t packet;
+  int num_bytes;
+  switch (tcode) {
+    case TCODE_PROG_TRACE_SYNC:
+      set_program_trace_sync_packet(&packet);
+      // print_packet(&packet);
+      num_bytes = packet_to_buffer(&packet);
+      fwrite(this->buffer, 1, num_bytes, this->trace_sink);
+      // print_encoded_packet(this->buffer, num_bytes);
+      break;
+    case TCODE_DBR:
+      set_direct_branch_packet(&packet);
+      // print_packet(&packet);
+      num_bytes = packet_to_buffer(&packet);
+      fwrite(this->buffer, 1, num_bytes, this->trace_sink);
+      // print_encoded_packet(this->buffer, num_bytes);
+      break;
+    case TCODE_IBR:
+      set_indirect_branch_packet(&packet);
+      // print_packet(&packet);
+      num_bytes = packet_to_buffer(&packet);
+      fwrite(this->buffer, 1, num_bytes, this->trace_sink);
+      // print_encoded_packet(this->buffer, num_bytes);
+      break;
+    default:
+      break;
+  }
+}
+
+void trace_encoder_n::set_program_trace_sync_packet(trace_encoder_n_packet_t* packet){
+  packet->tcode = TCODE_PROG_TRACE_SYNC;
+  packet->src = this->src;
+  packet->sync = SYNC_TRACE_EN;
+  packet->icnt = 0;
+  packet->f_addr = this->packet_0.i_addr >> 1;
+  this->prev_addr = packet->f_addr;
+}
+
+void trace_encoder_n::set_direct_branch_packet(trace_encoder_n_packet_t* packet){
+  packet->tcode = TCODE_DBR;
+  packet->src = this->src;
+  packet->icnt = this->icnt - this->packet_0.ilastsize;
+}
+
+void trace_encoder_n::set_indirect_branch_packet(trace_encoder_n_packet_t* packet){
+  packet->tcode = TCODE_IBR;
+  packet->src = this->src;
+  packet->b_type = B_INDIRECT;
+  packet->icnt = this->icnt - this->packet_0.ilastsize; 
+  uint64_t e_addr = this->packet_0.i_addr >> 1;
+  packet->u_addr = e_addr ^ this->prev_addr;
+  this->prev_addr = e_addr;
+}
+
+// returns the number of bytes written to the buffer
+int trace_encoder_n::packet_to_buffer(trace_encoder_n_packet_t* packet){
+  switch (packet->tcode) {
+    case TCODE_PROG_TRACE_SYNC:
+      return packet_to_buffer_program_trace_sync(packet);
+    case TCODE_DBR:
+      return packet_to_buffer_direct_branch_packet(packet);
+    case TCODE_IBR:
+      return packet_to_buffer_indirect_branch_packet(packet);
+    default:
+      break;
+  }
+}
+
+int trace_encoder_n::packet_to_buffer_program_trace_sync(trace_encoder_n_packet_t* packet) {
+  int msb = find_msb(packet->f_addr);
+  this->buffer[0] = packet->tcode << MDO_OFFSET | MSEO_IDLE;
+  this->buffer[1] = packet->sync << MDO_OFFSET | MSEO_IDLE;
+  this->buffer[1] |= (packet->f_addr & 0b11) << 6;
+  int num_bytes = 0;
+  if (msb < 2) {
+    this->buffer[1] |= MSEO_LAST;
+  } else {
+    packet->f_addr >>= 2;
+    msb -= 2;
+    num_bytes = ceil_div(msb, 6);
+    for (int iter = 0; iter < num_bytes; iter++) {
+      this->buffer[2 + iter] = ((packet->f_addr & 0x3F) << MDO_OFFSET) | MSEO_IDLE;
+      packet->f_addr >>= 6;
+    }
+    this->buffer[2 + num_bytes - 1] |= MSEO_LAST;
+  }
+  return 2 + num_bytes;
+}
+
+int trace_encoder_n::packet_to_buffer_direct_branch_packet(trace_encoder_n_packet_t* packet) {
+  this->buffer[0] = packet->tcode << MDO_OFFSET | MSEO_IDLE;
+  int msb = find_msb(packet->icnt);
+  int num_bytes = ceil_div(msb, 6);
+  for (int iter = 0; iter < num_bytes; iter++) {
+    this->buffer[1 + iter] = ((packet->icnt & 0x3F) << MDO_OFFSET) | MSEO_IDLE;
+    packet->icnt >>= 6;
+  }
+  this->buffer[1 + num_bytes - 1] |= MSEO_LAST;
+  return 1 + num_bytes;
+}
+
+int trace_encoder_n::packet_to_buffer_indirect_branch_packet(trace_encoder_n_packet_t* packet) {
+  this->buffer[0] = packet->tcode << MDO_OFFSET | MSEO_IDLE;
+  this->buffer[1] = packet->b_type << MDO_OFFSET | MSEO_IDLE;
+  // icnt
+  int icnt_msb = find_msb(packet->icnt);
+  int icnt_num_bytes = 0;
+  this->buffer[1] |= (packet->icnt & 0xF) << 4;
+  if (icnt_msb < 4) {
+    this->buffer[1] |= MSEO_EOF;
+  } else {
+    packet->icnt >>= 4;
+    icnt_msb -= 4;
+    icnt_num_bytes = ceil_div(icnt_msb, 6);
+    for (int iter = 0; iter < icnt_num_bytes; iter++) {
+      this->buffer[2 + iter] = ((packet->icnt & 0x3F) << MDO_OFFSET) | MSEO_IDLE;
+      packet->icnt >>= 6;
+    }
+    this->buffer[2 + icnt_num_bytes - 1] |= MSEO_EOF;
+  }
+  // u_addr
+  int u_addr_start = 2 + icnt_num_bytes;
+  int u_addr_msb = find_msb(packet->u_addr);
+  int u_addr_num_bytes = ceil_div(u_addr_msb, 6);
+  for (int iter = 0; iter < u_addr_num_bytes; iter++) {
+    this->buffer[u_addr_start + iter] = ((packet->u_addr & 0x3F) << MDO_OFFSET) | MSEO_IDLE;
+    packet->u_addr >>= 6;
+  }
+  this->buffer[u_addr_start + u_addr_num_bytes - 1] |= MSEO_LAST;
+  return u_addr_start + u_addr_num_bytes;
+}
+
+// returns the 0-index of the most significant bit
+int find_msb(uint64_t x) {
+  if (x == 0) return -1;
+  return 63 - __builtin_clzll(x);
+}
+
+// returns the ceiling of the division of a 0-indexed a by b
+int ceil_div(int a, int b) {
+  return a / b + 1;
+}